Year 2009

Refereed Publications – 2009

  1. D. Ghai, S. P. Mohanty, and E. Kougianos, “Design of Parasitic and Process Variation Aware RF Circuits: A Nano-CMOS VCO Case Study”, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 17, No. 9, September 2009, pp. 1339-1342.
  2. S. P. Mohanty, D. Ghai, E. Kougianos, and B. Joshi, “A Universal Level Converter Towards the Realization of Energy Efficient Implantable Drug Delivery Nano-Electro-Mechanical-Systems”, in Proceedings of the 10th International Symposium on Quality Electronic Design (ISQED), pp. 673-679, 2009 (blind review, 87 regular papers accepted out of 300 submissions, acceptance rate – 29%).
  3. D. Ghai, S. P. Mohanty, E. Kougianos, and P. Patra, “A PVT Aware Accurate Statistical Logic Library for High-K Metal-Gate Nano-CMOS”, in Proceedings of the 10th International Symposium on Quality Electronic Design (ISQED), pp. 47-54, 2009 (blind review, 87 regular papers accepted out of 300 submissions, acceptance rate – 29%).
  4. D. Ghai, S. P. Mohanty, and E. Kougianos, “Unified P4 (Power-Performance-Process-Parasitic) Fast Optimization of a Nano-CMOS VCO”, in Proceedings of the 19th ACM Great Lakes Symposium on VLSI (GLSVLSI), pp. 303-308, 2009 (blind review, 34 full papers and 28 short papers accepted out of 215 submissions, acceptance rate – 29%).
  5. D. Ghai, S. P. Mohanty, and E. Kougianos, “Variability-Aware Optimization of Nano-CMOS Active Pixel Sensors using Design and Analysis of Monte Carlo Experiments”, in Proceedings of the 10th International Symposium on Quality Electronic Design (ISQED), pp. 172-178, 2009 (blind review, 87 regular papers and 50 poster papers accepted out of 300 submissions, acceptance rate – 45.7%).
  6. S. P. Mohanty, D. Ghai, E. Kougianos, and P. Patra, “A Combined Packet Classifier and Scheduler Towards Net-Centric Multimedia Processor Design”, in Proceedings of the 27th IEEE International Conference on Consumer Electronics (ICCE), pp. 11-12, 2009.